module StageRegisters(
		clk,
		reset,
		hold, 
		nop, 
		///////////// reg input ////////////
		icode_i, 
		ifun_i, 
		rA_i, 
		rB_i,
		dstE_i,
		dstM_i,
		valC_i, 
		valP_i, 
		valA_i, 
		valB_i, 
		valE_i, 
		valM_i,
		Bch_i,
		///////////// reg output /////////////
		icode_o, 
		ifun_o, 
		rA_o, 
		rB_o,
		dstE_o,
		dstM_o,
		valC_o,
		valP_o,
		valA_o,
		valB_o,
		valE_o, 
		valM_o,
		Bch_o
);
input clk;
input hold;
input nop;
input reset;
input [3:0] icode_i;
input [3:0] ifun_i;
input [3:0] rA_i;
input [3:0] rB_i;
input [3:0] dstE_i;
input [3:0] dstM_i;
input [31:0] valC_i;
input [31:0] valP_i;
input [31:0] valA_i;
input [31:0] valB_i;
input [31:0] valE_i;
input [31:0] valM_i;
input Bch_i;

output reg [3:0] icode_o;
output reg [3:0] ifun_o;
output reg [3:0] rA_o;
output reg [3:0] rB_o;
output reg [3:0] dstE_o;
output reg [3:0] dstM_o;
output reg [31:0] valC_o;
output reg [31:0] valP_o;
output reg [31:0] valA_o;
output reg [31:0] valB_o;
output reg [31:0] valE_o;
output reg [31:0] valM_o;
output reg Bch_o;

always @(posedge clk) begin
	if(!reset) begin
		icode_o <= 4'b0;
		ifun_o <= 4'b0;
		rA_o <= 4'b0;
		rB_o <= 4'b0;
		dstE_o <= 4'h8;
		dstM_o <= 4'h8;
		valC_o <= 32'b0;
		valP_o <= 32'b0;
		valA_o <= 32'b0;
		valB_o <= 32'b0;
		valE_o <= 32'b0;
		valM_o <= 32'b0;
		Bch_o <= 1'b0;
	end else if (!hold) begin
		if(nop) begin
			icode_o <= 4'b0;
			ifun_o <= 4'b0;
			rA_o <= 4'b0;
			rB_o <= 4'b0;
			dstE_o <= 4'h8;
			dstM_o <= 4'h8;
			valC_o <= 32'b0;
			valP_o <= 32'b0;
			valA_o <= 32'b0;
			valB_o <= 32'b0;
			valE_o <= 32'b0;
			valM_o <= 32'b0;
			Bch_o <= 1'b0;
		end else begin
			icode_o <= icode_i;
			ifun_o <= ifun_i;
			rA_o <= rA_i;
			rB_o <= rB_i;
			dstE_o <= dstE_i;
			dstM_o <= dstM_i;
			valC_o <= valC_i;
			valP_o <= valP_i;
			valA_o <= valA_i;
			valB_o <= valB_i;
			valE_o <= valE_i;
			valM_o <= valM_i;
			Bch_o <= Bch_i;
		end
	end else begin
		icode_o <= icode_o;
		ifun_o <= ifun_o;
		rA_o <= rA_o;
		rB_o <= rB_o;
		dstE_o <= dstE_o;
		dstM_o <= dstM_o;
		valC_o <= valC_o;
		valP_o <= valP_o;
		valA_o <= valA_o;
		valB_o <= valB_o;
		valE_o <= valE_o;
		valM_o <= valM_o;
		Bch_o <= Bch_o;
	end
end

endmodule